A circuit for the regulation of an output voltage of a positive charge pump device can be applied particularly to integrated circuits using MOS or CMOS technology operating at low power supply voltages. In particular, the circuit can be applied to integrated circuits using 0.25 micron technology adapted to operate at a supply voltage of 2.5 volts (.+-.10%). Also, the circuit may be required to operate at lower voltages closer to 1 volt in certain applications intended for low power consumption, such as DRAM circuits.
For these applications, the leakage current of P-channel MOS transistors is reduced. In DRAMs, it is useful, for example, to reduce the leakage current of the memory cells to increase their retention time. It is also useful to reduce the power consumption of the integrated circuits in standby mode, particularly for portable or on-board installed systems.